US 11,955,517 B2
Semiconductor devices including protruding insulation portions between active fins
Shigenobu Maeda, Seongnam-si (KR); Hee-Soo Kang, Seoul (KR); Sang-Pil Sim, Seongnam-si (KR); and Soo-Hun Hong, Gunpo-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Nov. 15, 2020, as Appl. No. 17/098,412.
Application 14/463,394 is a division of application No. 14/021,465, filed on Sep. 9, 2013, granted, now 8,836,046, issued on Sep. 16, 2014.
Application 17/098,412 is a continuation of application No. 16/398,719, filed on Apr. 30, 2019, granted, now 10,861,934.
Application 16/398,719 is a continuation of application No. 15/467,159, filed on Mar. 23, 2017, granted, now 10,319,814, issued on Jun. 11, 2019.
Application 15/467,159 is a continuation of application No. 14/463,394, filed on Aug. 19, 2014, granted, now 9,627,483, issued on Apr. 18, 2017.
Claims priority of application No. 10-2012-0138132 (KR), filed on Nov. 30, 2012.
Prior Publication US 2021/0066454 A1, Mar. 4, 2021
Int. Cl. H01L 21/8234 (2006.01); B82Y 10/00 (2011.01); H01L 21/84 (2006.01); H01L 27/088 (2006.01); H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/16 (2006.01); H01L 29/161 (2006.01); H01L 29/165 (2006.01); H01L 29/417 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/775 (2006.01)
CPC H01L 29/0692 (2013.01) [B82Y 10/00 (2013.01); H01L 21/823431 (2013.01); H01L 21/845 (2013.01); H01L 27/0886 (2013.01); H01L 27/1211 (2013.01); H01L 29/0649 (2013.01); H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 29/1037 (2013.01); H01L 29/1608 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/41791 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01); H01L 29/785 (2013.01); H01L 29/775 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first channel active pattern protruding from a substrate and extending in a first direction;
a second channel active pattern protruding from the substrate and extending in the first direction, wherein the first and second channel active patterns are separated from one another in the first direction;
a field insulation layer disposed on the substrate;
a source/drain region between the first channel active pattern and the field insulation layer;
a first gate pattern disposed on the first channel active pattern and including a first gate and a first gate spacer; and
a second gate pattern disposed on the field insulation layer and including a second gate and a second gate spacer,
wherein a bottom of the second gate is higher than a lowermost part of the source/drain region,
wherein a bottom of the field insulation layer is lower than the lowermost part of the source/drain region, and
wherein the second gate vertically overlaps a portion of the first channel active pattern.