US 11,955,508 B2
Semiconductor device
Isaya Sobue, Yokohama (JP); and Hideyuki Komuro, Yokohama (JP)
Assigned to SOCIONEXT INC., Kanagawa (JP)
Filed by Socionext Inc., Kanagawa (JP)
Filed on Dec. 9, 2021, as Appl. No. 17/546,463.
Application 17/546,463 is a continuation of application No. PCT/JP2019/024107, filed on Jun. 18, 2019.
Prior Publication US 2022/0102479 A1, Mar. 31, 2022
Int. Cl. H01L 21/00 (2006.01); H01L 27/06 (2006.01); H01L 49/02 (2006.01); H01L 23/528 (2006.01); H01L 27/092 (2006.01)
CPC H01L 28/20 (2013.01) [H01L 27/0629 (2013.01); H01L 23/5286 (2013.01); H01L 27/092 (2013.01); H01L 27/0924 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate;
a first semiconductor region formed over the substrate;
a second semiconductor region formed over the substrate, and electrically connected to the first semiconductor region;
a third semiconductor region formed over the substrate, and positioned between the first semiconductor region and the second semiconductor region;
a fourth semiconductor region formed over the first semiconductor region;
a fifth semiconductor region formed over the second semiconductor region, and electrically connected to the fourth semiconductor region;
a sixth semiconductor region formed over the third semiconductor region, and positioned between the fourth semiconductor region and the fifth semiconductor region; and
wires formed between the first semiconductor region and the second semiconductor region, and between the fourth semiconductor region and the fifth semiconductor region, to cover the third semiconductor region and the sixth semiconductor region, the wires including conductors.