US 11,955,449 B2
Stacked semiconductor package
Jihwan Suh, Suwon-si (KR); Un-Byoung Kang, Hwaseong-si (KR); Taehun Kim, Cheonan-si (KR); Hyuekjae Lee, Hwaseong-si (KR); Jihwan Hwang, Hwaseong-si (KR); and Sang Cheon Park, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO, LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Nov. 10, 2022, as Appl. No. 18/054,530.
Application 18/054,530 is a continuation of application No. 16/992,895, filed on Aug. 13, 2020, granted, now 11,508,685.
Claims priority of application No. 10-2019-0132171 (KR), filed on Oct. 23, 2019.
Prior Publication US 2023/0076511 A1, Mar. 9, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01)
CPC H01L 24/32 (2013.01) [H01L 24/03 (2013.01); H01L 24/08 (2013.01); H01L 24/27 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 2224/0346 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/32059 (2013.01); H01L 2224/3207 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/33181 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06586 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor package, comprising:
mounting, on a substrate, a first semiconductor chip having a through electrode;
forming a second semiconductor chip;
disposing the second semiconductor chip on the first semiconductor chip such that a chip pad of the second semiconductor chip is in contact with the through electrode of the first semiconductor chip; and
forming a molding layer on the substrate,
wherein the forming of the second semiconductor chip includes:
forming a lower protective layer of a first insulation material on a bottom surface of a base layer having an integrated circuit;
forming the chip pad connected to the base layer through the lower protective layer;
etching a bottom surface of the lower protective layer to form a recess; and
filling an inside of the recess with a second insulation material to form an additional protective layer,
wherein a ductility of the second insulation material is greater than a ductility of the first insulation material, and
wherein, after disposing the second semiconductor chip on the first semiconductor chip, the through electrode and the chip pad are coupled to each other.