US 11,955,434 B2
Ultra small molded module integrated with die by module-on-wafer assembly
Yoshihiro Tomita, Tsukuba (JP); Eric J. Li, Chandler, AZ (US); Shawna M. Liff, Scottsdale, AZ (US); Javier A. Falcon, Chandler, AZ (US); and Joshua D. Heppner, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jul. 8, 2022, as Appl. No. 17/861,125.
Application 16/879,318 is a division of application No. 15/776,773, granted, now 10,707,171, issued on Jul. 7, 2020, previously published as PCT/US2015/067422, filed on Dec. 22, 2015.
Application 17/861,125 is a continuation of application No. 16/879,318, filed on May 20, 2020, abandoned.
Prior Publication US 2022/0344273 A1, Oct. 27, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/13 (2006.01); H01L 23/31 (2006.01); H01L 23/48 (2006.01); H01L 23/498 (2006.01); H01L 23/552 (2006.01); H01L 25/04 (2023.01); H01L 25/065 (2023.01); H01L 25/07 (2006.01); H01L 25/075 (2006.01); H01L 25/11 (2006.01); H01L 25/16 (2023.01)
CPC H01L 23/5389 (2013.01) [H01L 21/486 (2013.01); H01L 21/561 (2013.01); H01L 21/565 (2013.01); H01L 21/568 (2013.01); H01L 23/13 (2013.01); H01L 23/3121 (2013.01); H01L 23/48 (2013.01); H01L 23/49816 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 23/552 (2013.01); H01L 24/19 (2013.01); H01L 24/48 (2013.01); H01L 24/96 (2013.01); H01L 25/04 (2013.01); H01L 25/0652 (2013.01); H01L 25/0655 (2013.01); H01L 25/16 (2013.01); H01L 24/16 (2013.01); H01L 25/042 (2013.01); H01L 25/071 (2013.01); H01L 25/072 (2013.01); H01L 25/0753 (2013.01); H01L 25/112 (2013.01); H01L 25/115 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/13101 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81024 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06568 (2013.01); H01L 2225/06586 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/1304 (2013.01); H01L 2924/1436 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/181 (2013.01); H01L 2924/1815 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A package comprising:
a die having a first surface opposite a second surface, the die having a first side and a second side between the first surface and the second surface, the second side opposite the first side, and the die having a lateral width between the first side and the second side;
a redistribution layer on the first surface of the die; and
a module coupled to the redistribution layer, wherein the module comprises:
a mold layer having a first surface opposite a second surface, the mold layer having a lateral width smaller than the lateral width of the die; and
a plurality of components within the mold layer, wherein each of the components includes terminals, and wherein the terminals are electrically coupled to the redistribution layer.