US 11,955,396 B2
Semiconductor packaging method, semiconductor assembly and electronic device comprising semiconductor assembly
Weiping Li, Shanghai (CN)
Assigned to Yibu Semiconductor Co., Ltd., Shanghai (CN)
Filed by Yibu Semiconductor Co., Ltd., Shanghai (CN)
Filed on Nov. 26, 2021, as Appl. No. 17/535,983.
Claims priority of application No. 202011352624.1 (CN), filed on Nov. 27, 2020; and application No. 202011353294.8 (CN), filed on Nov. 27, 2020.
Prior Publication US 2022/0173004 A1, Jun. 2, 2022
Int. Cl. H01L 23/02 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01)
CPC H01L 23/3128 (2013.01) [H01L 24/16 (2013.01); H01L 2224/16221 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor packaging method, comprising:
providing at least one semiconductor device and a carrier board, wherein each of the at least one semiconductor device respectively has an active surface and an opposing passive surface, the active surface is formed with connection terminals, the passive surface is formed with a plurality of first alignment solder parts, and the carrier board is formed with a plurality of second alignment solder parts respectively corresponding to the plurality of first alignment solder parts;
placing the at least one semiconductor device on a surface of the carrier board such that the plurality of first alignment solder parts are substantially aligned with respective ones of the plurality of second alignment solder parts;
forming a plurality of alignment solder joints by soldering the plurality of first alignment solder parts to respective ones of the plurality of second alignment solder parts whereby the at least one semiconductor device is aligned and fixed to the carrier board;
encapsulating the at least one semiconductor device using a molding compound to form a molded package body on a side of the carrier board where the at least one semiconductor device is disposed;
exposing the connection terminals from the molded package body; and
sequentially forming an interconnection layer and external terminals on a surface of the molded package body whereby the connection terminals are electrically connected to the external terminals through the interconnection layer;
wherein one of a respective first alignment solder part and a corresponding second alignment solder part is a solder bump, and the other of the respective first alignment solder part and the corresponding second alignment solder part is a solder pad or a solder bump;
wherein at least the first or second alignment solder bumps are made of solder, and soldering is performed by melting the solder;
the method further comprising, after forming a plurality of alignment solder joints, further aligning the at least one semiconductor device to the carrier board by: turning the at least one semiconductor device and the carrier board as a whole to enable the active surface to face downwards, melting or partially melting the plurality of alignment solder joints, and subsequently cooling and solidifying the plurality of alignment solder joints while the active surface faces downwards.