US 11,955,376 B2
Etch damage and ESL free dual damascene metal interconnect
Sunil Kumar Singh, Hsinchu (TW); Chung-Ju Lee, Hsinchu (TW); and Tien-I Bao, Taoyuan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Nov. 4, 2021, as Appl. No. 17/518,885.
Application 17/518,885 is a division of application No. 16/426,074, filed on May 30, 2019, granted, now 11,171,041.
Application 15/083,484 is a division of application No. 14/146,941, filed on Jan. 3, 2014, granted, now 9,318,377, issued on Apr. 19, 2016.
Application 14/146,941 is a division of application No. 13/526,640, filed on Jun. 19, 2012, granted, now 8,652,962, issued on Feb. 18, 2014.
Application 16/426,074 is a continuation of application No. 15/726,590, filed on Oct. 6, 2017, granted, now 10,312,136, issued on Jun. 4, 2019.
Application 15/726,590 is a continuation of application No. 15/083,484, filed on Mar. 29, 2016, granted, now 9,786,549, issued on Oct. 10, 2017.
Prior Publication US 2022/0059404 A1, Feb. 24, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/4763 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01)
CPC H01L 21/76807 (2013.01) [H01L 21/76808 (2013.01); H01L 21/7682 (2013.01); H01L 21/76835 (2013.01); H01L 21/76877 (2013.01); H01L 21/76879 (2013.01); H01L 21/76885 (2013.01); H01L 23/481 (2013.01); H01L 23/5222 (2013.01); H01L 23/53238 (2013.01); H01L 23/5329 (2013.01); H01L 23/53295 (2013.01); H01L 21/76814 (2013.01); H01L 21/76831 (2013.01); H01L 2221/1026 (2013.01); H01L 2221/1031 (2013.01); H01L 2221/1036 (2013.01); H01L 2221/1047 (2013.01); H01L 2924/0002 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor substrate;
a dielectric structure arranged over the semiconductor substrate;
first and second metal vias disposed in the dielectric structure and spaced laterally apart from one another;
first and second metal lines disposed in the dielectric structure and having nearest neighboring sidewalls that are spaced laterally apart from one another by a portion of the dielectric structure, wherein the nearest neighboring sidewalls include a first sidewall and a second sidewall, wherein the portion of the dielectric structure extends continuously from the first sidewall to the second sidewall, the first and second metal lines contacting upper portions of the first and second metal vias, respectively; and
first and second air gaps disposed in the portion of the dielectric structure, the first and second air gaps being proximate to the nearest neighboring sidewalls of the first and second metal lines, respectively.