US 11,955,346 B2
Semiconductor device with a multi-layered encapsulant and associated systems, devices, and methods
Shijian Luo, Boise, ID (US); and Jonathan S. Hacker, Meridian, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Apr. 12, 2021, as Appl. No. 17/227,525.
Application 17/227,525 is a continuation of application No. 16/436,461, filed on Jun. 10, 2019, granted, now 11,004,697.
Application 16/436,461 is a continuation of application No. 16/009,119, filed on Jun. 14, 2018, granted, now 10,622,223, issued on Apr. 14, 2020.
Application 16/009,119 is a continuation of application No. 15/817,000, filed on Nov. 17, 2017, granted, now 10,763,131, issued on Sep. 1, 2020.
Prior Publication US 2021/0257226 A1, Aug. 19, 2021
Int. Cl. H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01)
CPC H01L 21/563 (2013.01) [H01L 23/3157 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 24/91 (2013.01); H01L 24/83 (2013.01); H01L 2224/13082 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/26145 (2013.01); H01L 2224/29023 (2013.01); H01L 2224/73104 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/83007 (2013.01); H01L 2224/83191 (2013.01); H01L 2224/83193 (2013.01); H01L 2224/9211 (2013.01); H01L 2224/94 (2013.01); H01L 2924/18161 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate;
traces on a top surface of the substrate;
a prefill material over the substrate and between the traces, wherein the prefill material directly contacts peripheral surfaces of the traces;
a die attached over the substrate;
solder located between and electrically coupling the substrate and the die; and
a wafer-level underfill between the prefill material and the die, wherein the wafer-level underfill includes material at least initially configured to reduce viscosity during at least a portion of reflowing the solder, wherein the wafer-level underfill persists as a layer separate from the prefill material after curing.