US 11,955,185 B2
Semiconductor device and memory system
Takayuki Tsukamoto, Kanagawa (JP)
Assigned to KIOXIA CORPORATION, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Feb. 23, 2023, as Appl. No. 18/173,499.
Application 18/173,499 is a continuation of application No. 17/699,982, filed on Mar. 21, 2022, granted, now 11,615,852.
Application 17/699,982 is a continuation of application No. 17/010,198, filed on Sep. 2, 2020, granted, now 11,302,400, issued on Apr. 12, 2022.
Claims priority of application No. 2020-042001 (JP), filed on Mar. 11, 2020.
Prior Publication US 2023/0207025 A1, Jun. 29, 2023
Int. Cl. G11C 16/30 (2006.01); G06F 3/06 (2006.01)
CPC G11C 16/30 (2013.01) [G06F 3/0625 (2013.01); G06F 3/0634 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A regulator comprising:
a first transistor including a first end configured to be connected to a power supply voltage;
a first circuit configured to apply a first voltage to a gate of the first transistor, wherein the first voltage is determined based on a difference between a second voltage and a third voltage;
a first capacitor having a first electrode connected to the first circuit and a second electrode connected to an output terminal;
a second circuit including a second capacitor having a first electrode connected to the power supply voltage and a first resistor having a first end connected to a second electrode of the second capacitor; and
a third circuit configured to:
electrically disconnect the second circuit from the gate of the first transistor and electrically disconnect a second end of the first transistor from the output terminal in a first operation mode; and
electrically connect the second circuit to the gate of the first transistor and electrically connect the second end of the first transistor to the output terminal in a second operation mode different from the first operation mode.