US 11,955,157 B2
Physically unclonable function apparatus based on ferroelectric elements and operation method thereof
Seong Ook Jung, Seoul (KR); Se Hee Lim, Seoul (KR); Tae Woo Oh, Seoul (KR); Se Keon Kim, Seoul (KR); and Dong Han Ko, Seoul (KR)
Assigned to INDUSTRY-ACADEMIC CORPORATION FOUNDATION, YONSEI UNIVERSITY, Seoul (KR)
Filed by INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY, Seoul (KR)
Filed on Feb. 14, 2022, as Appl. No. 17/671,516.
Claims priority of application No. 10-2021-0021619 (KR), filed on Feb. 18, 2021.
Prior Publication US 2022/0383927 A1, Dec. 1, 2022
Int. Cl. G11C 11/22 (2006.01)
CPC G11C 11/2295 (2013.01) [G11C 11/223 (2013.01); G11C 11/2255 (2013.01); G11C 11/2273 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A PUF apparatus comprising:
a PUF cell array in which a plurality of PUF cells are arranged each including a FeFET pair whose gates are commonly connected to a corresponding word line among a plurality of word lines, and whose drains and sources are respectively connected to a corresponding bit line pair and a corresponding source line pair among a plurality of bit line pairs and a plurality of source line pairs running in a direction crossing the plurality of word lines; and
a read-write-back block which is activated according to a read enable signal, and senses and amplifies a voltage difference occurring in a corresponding bit line pair among the plurality of bit line pairs according to the difference in driving strength due to a deviation in a manufacturing process of the FeFET pair included in a PUF cell selected by a selected word line among the plurality of word lines,
wherein the read-write-back block includes:
an amplifying block having a plurality of first sense amplifiers which are disposed between the plurality of bit line pairs and a voltage line, respectively, and which cross-sense the corresponding bit line pair and amplify the voltage difference between the corresponding bit line pair; and
a write-back block having a plurality of second sense amplifiers which are disposed between the plurality of source line pairs and a ground line, respectively, and which are activated according to the read enable signal, cross-sense the corresponding bit line pair and generate a voltage difference in the corresponding source line pair.