US 11,955,053 B2
Systems and methods of driving a display with high bit depth
Ian Kyles, West Linn, OR (US); Nicholas William Melena, Phoenix, AZ (US); Edmund Passon, Scottsdale, AZ (US); and Joshua T. Wiersma, Phoenix, AZ (US)
Assigned to Snap Inc., Santa Monica, CA (US)
Appl. No. 17/791,153
Filed by Snap Inc., Santa Monica, CA (US)
PCT Filed Jan. 7, 2021, PCT No. PCT/US2021/012472
§ 371(c)(1), (2) Date Jul. 6, 2022,
PCT Pub. No. WO2021/142099, PCT Pub. Date Jul. 15, 2021.
Claims priority of provisional application 62/958,019, filed on Jan. 7, 2020.
Prior Publication US 2023/0022217 A1, Jan. 26, 2023
Int. Cl. G09G 3/20 (2006.01); G09G 3/32 (2016.01); G09G 3/36 (2006.01)
CPC G09G 3/2096 (2013.01) [G09G 3/2007 (2013.01); G09G 3/32 (2013.01); G09G 3/3611 (2013.01); G09G 2310/06 (2013.01); G09G 2310/08 (2013.01); G09G 2370/00 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display system for driving pixels of a pixel array comprising:
a display subsystem for displaying images and executing commands from an image or video data source, said display subsystem comprising:
display driver circuitry for receiving image frame data and commands from the image or video data source, said image frame data comprising pixel intensity or brightness values for bit planes of an image frame or subframe;
a parser for receiving the image frame data and the commands, and configured to determine a drive waveform having a pixel drive value and a pixel drive time interval for each bit plane of the image frame data;
and
a display backplane for receiving the drive waveform, said display backplane comprising pixel driver circuitry for driving the pixels in accordance with the drive waveform and wherein an intensity or brightness of each pixel varies for each bit plane according to the corresponding pixel drive value and the corresponding pixel drive time interval,
wherein:
the drive waveform for each pixel or selection of pixels of the pixel array is transmitted as commands to the display backplane; and
the image frame data is transmitted to memory elements of the display driver circuitry.