US 11,954,587 B2
System-on-chip for artificial neural network being operated according to dynamically calibrated phase of clock signal
Seong Jin Lee, Seongnam-si (KR); Jin Gun Song, Seongnam-si (KR); and Lok Won Kim, Yongin-si (KR)
Assigned to DEEPX CO., LTD., Seongnam-si (KR)
Filed by DEEPX CO., LTD., Seongnam-si (KR)
Filed on Sep. 25, 2023, as Appl. No. 18/473,777.
Claims priority of application No. 10-2023-0114904 (KR), filed on Aug. 30, 2023.
Prior Publication US 2024/0013039 A1, Jan. 11, 2024
Int. Cl. G06N 3/063 (2023.01)
CPC G06N 3/063 (2013.01) 18 Claims
OG exemplary drawing
 
1. A system-on-chip (SoC) comprising:
a semiconductor substrate;
a first circuitry, disposed on the semiconductor substrate, provided for a first neural processing unit (NPU) configured to perform operations of an artificial neural network (ANN) model;
a second circuitry, disposed on the semiconductor substrate, provided for a second NPU configured to perform operations of an ANN model; and
a third circuitry, disposed on the semiconductor substrate, configured to generate a control signal to selectively output one or more clock signals,
wherein the control signal to selectively output the one or more clock signals is generated based on a power measured by a power management integrated circuit,
wherein each of the first NPU and the second NPU includes a plurality of processing elements (PEs), and the plurality of PEs include an adder, a multiplier, and an accumulator,
wherein the one or more clock signals include an original clock signal and one or more phase-delayed clock signals based on a phase of the original clock signal,
wherein a first clock signal among the one or more clock signals is applied to the first NPU according to the control signal, and
wherein a second clock signal among the one or more clock signals is applied to the second NPU according to the control signal.