US 11,954,359 B2
Circular buffer architecture using local memories with limited resources
Kristof Denolf, Longmont, CO (US); Jack S. Lo, Santa Clara, CA (US); Louis Coulon, Miserey-Salines (FR); and Kornelis A. Vissers, Sunnyvale, CA (US)
Assigned to Xilinx, Inc., San Jose, CA (US)
Filed by Xilinx, Inc., San Jose, CA (US)
Filed on Dec. 28, 2021, as Appl. No. 17/646,172.
Prior Publication US 2023/0205452 A1, Jun. 29, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0656 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic system having a circular buffer, the circular buffer comprising:
a memory coupled to a producer circuit and a consumer circuit, wherein the memory is configured to store a plurality of objects;
wherein the memory comprises a plurality of memory banks, wherein a number of the plurality of memory banks is less than a number of the plurality of objects;
a plurality of hardware locks configured to reserve selected ones of the plurality of memory banks for use by the producer circuit or the consumer circuit; and
a buffer controller coupled to the memory and configured to track a plurality of positions including a consumer bank position, a consumer object position, a producer bank position, and a producer object position;
wherein the buffer controller is configured to allocate selected ones of the plurality of objects from the plurality of memory banks to the producer circuit and to the consumer circuit according to the plurality of positions as tracked and using the plurality of hardware locks.