US 11,954,041 B2
Controller including map cache and memory system including controller
Joung Young Lee, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Mar. 18, 2021, as Appl. No. 17/205,398.
Claims priority of application No. 10-2020-0120336 (KR), filed on Sep. 18, 2020.
Prior Publication US 2022/0091993 A1, Mar. 24, 2022
Int. Cl. G06F 12/10 (2016.01); G06F 12/0875 (2016.01); G06F 16/2455 (2019.01)
CPC G06F 12/10 (2013.01) [G06F 12/0875 (2013.01); G06F 16/24558 (2019.01); G06F 2212/657 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A controller comprising:
a descriptor manager configured to generate descriptors including logical addresses and physical addresses respectively mapped to the logical addresses;
a map cache configured to store the descriptors in at least one of a linear structure, a binary tree structure, and both the linear tree structure and the binary tree structure; and
a map search engine configured to search for a descriptor corresponding to a logical address received from an external device among the descriptors stored in at least one of the linear structure, the binary tree structure, and both the linear structure and the binary tree structure based on a structure of each of the descriptors stored in the map cache,
wherein the descriptor manager stores the descriptors in the linear structure of the map cache, then performs a calculation of a first descriptor among the descriptors for storing the first descriptor in the binary tree structure, and then transmits the first descriptor of which the calculation is finished from the linear structure to the binary tree structure.