US 11,953,976 B2
Detecting and recovering from fatal storage errors
Ayberk Ozturk, Irvine, CA (US); Scott Chao-Chueh Lee, Bellevue, WA (US); Brennan Alexander Watt, San Clemente, CA (US); and Vishal Jose Mannanal, Renton, WA (US)
Assigned to Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed by Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed on May 17, 2023, as Appl. No. 18/319,354.
Application 18/319,354 is a continuation of application No. 17/532,651, filed on Nov. 22, 2021, granted, now 11,687,395.
Application 17/532,651 is a continuation of application No. 16/687,218, filed on Nov. 18, 2019, granted, now 11,182,232, issued on Nov. 23, 2021.
Prior Publication US 2023/0289249 A1, Sep. 14, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/07 (2006.01); G06F 11/14 (2006.01)
CPC G06F 11/0772 (2013.01) [G06F 11/0745 (2013.01); G06F 11/1441 (2013.01); G06F 11/1471 (2013.01)] 20 Claims
OG exemplary drawing
 
1. In a computing environment including a processor device in communication with storage hardware, a method performed by the storage hardware, the method comprising:
detecting, by the storage hardware, a panic condition preventing the storage hardware from functioning as configured;
setting a panic bit to an on state to indicate the panic condition to the processor device, wherein the on state of the panic bit is readable by the processor device;
preparing for intervention by the processor device by preventing the processor device from performing a recovery action on the storage hardware; and
reestablishing communication between the storage hardware and the processor device after preparing for the intervention by the processor device.