US 11,953,527 B2
Peak voltage amplitude detectors tolerant to process variation and device mismatch and related methods
Ping Lu, Cary, NC (US); Shaishav A. Desai, San Diego, CA (US); and Minhan Chen, Cary, NC (US)
Assigned to Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed by Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed on Aug. 24, 2022, as Appl. No. 17/894,626.
Prior Publication US 2024/0069074 A1, Feb. 29, 2024
Int. Cl. G01R 19/04 (2006.01); H03K 5/1532 (2006.01)
CPC G01R 19/04 (2013.01) [H03K 5/1532 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A peak detector, comprising:
a plurality of amplitude detection circuits coupled in parallel to a first signal input and a second signal input, each of the plurality of amplitude detection circuits configured to generate, on an output, a peak voltage indicating an amplitude of an input signal received on the first signal input and the second signal input;
an averaging circuit coupled to the output of each of the plurality of amplitude detection circuits, the averaging circuit configured to generate, on a peak detector output, an average voltage comprising an average of the peak voltages on the outputs of the plurality of amplitude detection circuits;
wherein each of the plurality of amplitude detection circuits comprises:
a first input switch coupled to the first signal input;
a second input switch coupled to the second signal input; and
an output switch coupled to the output.