US 12,274,181 B2
Magnetic tunnel junction device and method
Tai-Yen Peng, Hsinchu (TW); Yu-Feng Yin, Hsinchu (TW); An-Shen Chang, Jubei (TW); Han-Ting Tsai, Kaoshiung (TW); and Qiang Fu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Apr. 18, 2023, as Appl. No. 18/302,538.
Application 18/302,538 is a division of application No. 16/887,244, filed on May 29, 2020, granted, now 11,665,977.
Prior Publication US 2023/0255120 A1, Aug. 10, 2023
Int. Cl. H10N 50/80 (2023.01); G11C 11/16 (2006.01); H10B 61/00 (2023.01); H10N 50/01 (2023.01)
CPC H10N 50/80 (2023.02) [G11C 11/161 (2013.01); G11C 11/1655 (2013.01); G11C 11/1657 (2013.01); H10B 61/22 (2023.02); H10N 50/01 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a magnetoresistive random access memory cell over a substrate, the magnetoresistive random access memory cell comprising:
a first bottom electrode over the substrate;
a first magnetic tunnel junction stack over the first bottom electrode;
a first top electrode over the first magnetic tunnel junction stack;
forming a first dielectric layer laterally surrounding the first bottom electrode, the first magnetic tunnel junction stack, and the first top electrode;
recessing the first dielectric layer to expose portions of sidewalls of the first top electrode;
forming a protective structure contacting the exposed portions of the sidewalls of the first top electrode;
depositing a first inter-metal dielectric over the magnetoresistive random access memory cell; and
forming a conductive feature extending through the first inter-metal dielectric, the conductive feature contacting the first top electrode and the protective structure.