US 12,274,180 B2
Semiconductor device and method for fabricating the same
Hui-Lin Wang, Taipei (TW); Chen-Yi Weng, New Taipei (TW); Si-Han Tsai, Taichung (TW); Che-Wei Chang, Taichung (TW); Po-Kai Hsu, Tainan (TW); Jing-Yin Jhang, Tainan (TW); Yu-Ping Wang, Hsinchu (TW); Ju-Chun Fan, Tainan (TW); Ching-Hua Hsu, Koahsiung (TW); Yi-Yu Lin, Taichung (TW); and Hung-Yueh Chen, Hsinchu (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Mar. 17, 2023, as Appl. No. 18/122,730.
Application 18/122,730 is a division of application No. 17/086,447, filed on Nov. 1, 2020, granted, now 11,637,233.
Claims priority of application No. 202011058791 (CN), filed on Sep. 30, 2020.
Prior Publication US 2023/0240151 A1, Jul. 27, 2023
Int. Cl. H10N 50/80 (2023.01); H10B 61/00 (2023.01); H10N 50/01 (2023.01); H10N 50/20 (2023.01); H10N 50/85 (2023.01)
CPC H10N 50/80 (2023.02) [H10B 61/00 (2023.02); H10N 50/01 (2023.02); H10N 50/20 (2023.02); H10N 50/85 (2023.02)] 4 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a magnetic tunneling junction (MTJ) on a substrate;
a top electrode on the MTJ;
a first inter-metal dielectric (IMD) layer around the MTJ;
a second IMD layer on the first IMD layer;
a metal interconnection in the second IMD layer and connected to the MTJ; and
a bump adjacent to the metal interconnection, wherein a bottom surface of the bump is higher than a top surface of the top electrode and a top surface of the bump is lower than a top surface of the first IMD layer.