US 12,274,081 B2
Semiconductor structure and method for forming the same
Ming-Hua Chang, Tainan (TW); Po-Wen Su, Kaohsiung (TW); and Chih-Tung Yeh, Taoyuan (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Nov. 27, 2023, as Appl. No. 18/519,099.
Application 18/519,099 is a division of application No. 17/396,793, filed on Aug. 9, 2021, granted, now 12,218,229.
Claims priority of application No. 202110527145.7 (CN), filed on May 14, 2021.
Prior Publication US 2024/0088279 A1, Mar. 14, 2024
Int. Cl. H10D 30/47 (2025.01); H01L 21/311 (2006.01); H10D 30/01 (2025.01); H10D 62/85 (2025.01)
CPC H10D 30/472 (2025.01) [H01L 21/31116 (2013.01); H10D 30/015 (2025.01); H10D 62/8503 (2025.01)] 10 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor structure, comprising:
forming a stacked structure on a substrate;
forming an insulating layer on the stacked structure;
forming a passivation layer on the insulating layer;
performing an etching process to form an opening through the passivation layer and the insulating layer to expose a top surface of the stacked structure and an extending portion of the insulating layer that protrudes from a sidewall of the opening and hangs above the top surface of the stacked structure;
forming a liner along and in direct contact with the sidewall of the opening, a top surface and a bottom surface of the extending portion, and the top surface of the stacked structure; and
forming a metal layer on the liner and filling the opening.