	US 12,274,080 B2
	High electron mobility transistor including conductive plate filling trenches in passivation layer, and method for forming the same
Po-Yu Yang, Hsinchu (TW); and Hsun-Wen Wang, Taipei (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Nov. 9, 2023, as Appl. No. 18/506,101.
Application 18/506,101 is a division of application No. 17/203,723, filed on Mar. 16, 2021, granted, now 11,855,174.
Claims priority of application No. 202110086554.8 (CN), filed on Jan. 22, 2021.
Prior Publication US 2024/0072153 A1, Feb. 29, 2024
Int. Cl. H01L 29/66 (2006.01); H01L 29/778 (2006.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01)

CPC H10D 30/015 (2025.01) [H10D 30/475 (2025.01)]

3 Claims

1. A method for forming a high electron mobility transistor,

comprising:

providing a substrate;

forming a channel layer, a barrier layer, and a first passivation layer sequentially on the substrate;

forming a plurality of trenches through at least a portion of the first passivation layer, wherein the plurality of trenches are parallel to each other along a first direction;

forming a second passivation layer on the first passivation layer and covering along sidewalls and bottom surfaces of the plurality of trenches;

forming a conductive plate structure on the second passivation layer and filling the plurality of trenches; and

forming a gate structure, a drain structure, and a source structure on the barrier layer and arranged along the first direction, wherein the conductive plate structure is disposed between the gate structure and the drain structure and physically separated from the gate structure.