US 12,274,069 B2
Semiconductor device having ferroelectric layer in recess and method for manufacturing the same
Weixing Huang, Beijing (CN); and Huilong Zhu, Beijing (CN)
Assigned to BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY, Beijing (CN); and INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES, Beijing (CN)
Appl. No. 17/783,627
Filed by BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY, Beijing (CN); and INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES, Beijing (CN)
PCT Filed Dec. 23, 2021, PCT No. PCT/CN2021/140813
§ 371(c)(1), (2) Date Jun. 8, 2022,
PCT Pub. No. WO2023/108785, PCT Pub. Date Jun. 22, 2023.
Claims priority of application No. 202111535097.2 (CN), filed on Dec. 15, 2021.
Prior Publication US 2024/0164110 A1, May 16, 2024
Int. Cl. H10B 51/30 (2023.01); H10B 51/10 (2023.01); H10B 51/20 (2023.01)
CPC H10B 51/30 (2023.02) [H10B 51/10 (2023.02); H10B 51/20 (2023.02)] 13 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate;
a first electrode layer, located at a side of the substrate;
a functional layer, located at a side of the first electrode layer away from the substrate, wherein the functional layer comprises a first region and a second region surrounding the first region, the first region is made of at least germanium, and the second region comprises a ferroelectric layer and a gate that are stacked; and
a second electrode layer, located at a side of the functional layer away from the substrate, wherein the first electrode layer serves as one of a source layer and a drain layer, and the second electrode layer serves as another of the source layer and the drain layer;
wherein the second region is located in a recess formed by a sidewall of the first region, the recess opens toward a direction that is parallel with the substrate and away from the first region, and an opening dimension of the recess in a direction perpendicular to the substrate gradually increases along the direction that is parallel with the substrate and away from the first region; and
wherein the ferroelectric layer is located at an inner surface of the recess and is conformed to the inner surface, and the gate is located at a side of the ferroelectric layer away from the first region.