US 12,274,055 B2
Control gate structures in three-dimensional memory devices and methods for forming the same
Yuancheng Yang, Hubei (CN); Lei Liu, Hubei (CN); and Wenxi Zhou, Hubei (CN)
Assigned to Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed on May 26, 2022, as Appl. No. 17/825,807.
Claims priority of application No. 202110669228.X (CN), filed on Jun. 17, 2021.
Prior Publication US 2022/0406805 A1, Dec. 22, 2022
Int. Cl. H10B 41/27 (2023.01); H10B 41/30 (2023.01)
CPC H10B 41/27 (2023.02) [H10B 41/30 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method for forming a three-dimensional (3D) memory device, comprising:
disposing a layer stack on a substrate, wherein the layer stack includes a plurality of levels;
forming a first control gate structure in a first level of the plurality of levels, wherein forming the first control gate structure further includes:
forming a first opening through a dielectric layer of the first level and a sacrificial layer of the first level;
removing a remaining portion of the sacrificial layer of the first level to form a first cavity;
disposing a first dielectric layer in the first cavity; and
disposing a first conductive layer in the first cavity; and
forming a second control gate structure in a second level below the first level, wherein forming the second control gate structure further includes:
extending the first opening into a dielectric layer of the second level and a sacrificial layer of the second level to form a second opening;
removing a remaining portion of the sacrificial layer of the second level to form a second cavity;
disposing a second dielectric layer in the second cavity, wherein the first dielectric layer and the second dielectric layer are different materials; and
disposing a second conductive layer in the second cavity.