| CPC H10B 12/315 (2023.02) [G11C 5/063 (2013.01); H10B 12/0335 (2023.02)] | 11 Claims |

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1. A dynamic random access memory device, comprising:
a substrate comprising a first active region, a first isolation region, a second active region, and a second isolation region arranged in order along a first direction;
a first bit line disposed on the first active region and direct contacting the first active region;
a second bit line disposed on the second isolation region;
an insulating layer disposed between and separating the second bit line and the second isolation region; and
a storage node contact structure disposed between the first bit line and the second bit line and directly contacting a top surface of the second active region, a sidewall of the first isolation region, and a sidewall of the second isolation region.
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