US 12,273,281 B2
Statistical high bandwidth and packet rate crossbar with low cell count
Idan Matari, Lod (IL); Matisyahu Meier Goldmeier, Kiryat Gat (IL); George Elias, Tel-Aviv (IL); Ofir Klara Altshul, Herzliya (IL); Itamar Rabenstein, Petach-Tiqwa (IL); Noam Michaelis, Kfar-Saba (IL); and Eyal Srebro, Kfar Yehoshua (IL)
Assigned to MELLANOX TECHNOLOGIES, LTD., Yokneam (IL)
Filed by MELLANOX TECHNOLOGIES, LTD., Yokneam (IL)
Filed on May 30, 2023, as Appl. No. 18/203,227.
Prior Publication US 2024/0406122 A1, Dec. 5, 2024
Int. Cl. H04L 49/101 (2022.01); H04L 49/00 (2022.01); H04L 49/111 (2022.01); H04L 49/253 (2022.01)
CPC H04L 49/101 (2013.01) [H04L 49/254 (2013.01); H04L 49/3009 (2013.01); H04L 49/111 (2022.05)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a crossbar circuit that routes one or more packets between one or more ingress domains and one or more egress domains associated with the apparatus, wherein the crossbar circuit comprises a plurality of sub crossbar domains;
one or more ingress control circuits associated with the one or more ingress domains, wherein the one or more ingress control circuits are to distribute packet data of the one or more packets to the plurality of sub crossbar domains;
an egress control circuit associated with an egress domain of the one or more egress domains, wherein the egress control circuit is to receive data bits associated with the packet data from egresses associated with the plurality of sub crossbar domains; and
one or more queueing circuits comprising a dispatcher circuit, wherein the dispatcher circuit is to:
spread a set of transmission jobs among the plurality of sub crossbar domains based on a target order; and
allocate buffer space in an egress reorder buffer associated with the egress domain.