US 12,273,128 B2
Delta-sigma modulator
Chia-Ling Chang, Hsinchu (TW)
Assigned to REALTEK SEMICONDUCTOR CORP., Hsinchu (TW)
Filed by REALTEK SEMICONDUCTOR CORP., Hsinchu (TW)
Filed on Mar. 16, 2023, as Appl. No. 18/185,026.
Claims priority of application No. 111109750 (TW), filed on Mar. 17, 2022.
Prior Publication US 2023/0299787 A1, Sep. 21, 2023
Int. Cl. H03M 3/00 (2006.01)
CPC H03M 3/47 (2013.01) [H03M 3/454 (2013.01); H03M 3/458 (2013.01); H03M 3/462 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A delta-sigma modulator, comprising:
a multiplexer configured to receive a first analog signal and a second analog signal, and output an input signal, wherein the first analog signal and the second analog signal are in different electrical forms, and the multiplexer is configured to select, in a time-division manner, the first analog signal or the second analog signal as the input signal to be output;
a modulation circuit coupled to the multiplexer, wherein the modulation circuit is configured to modulate the input signal into a digital signal; and
a demultiplexer coupled to the modulation circuit, wherein the demultiplexer has a first output terminal and a second output terminal, and is configured to receive the digital signal and select the first output terminal or the second output terminal in the time-division manner, so as to output the digital signal;
wherein, in response to the input signal being a direct current signal, a loop filter of the modulation circuit is reset according to a reset signal with a high level, and an oversampling rate is used as a period where the reset signal changes from a low level to the high level.