US 12,273,123 B2
Transition-state output device, time-to-digital converter, and analog-to-digital converter circuit
Masayoshi Todorokihara, Suwa (JP)
Assigned to SEIKO EPSON CORPORATION, (JP)
Filed by SEIKO EPSON CORPORATION, Tokyo (JP)
Filed on Dec. 5, 2023, as Appl. No. 18/528,968.
Application 18/528,968 is a continuation of application No. 17/533,373, filed on Nov. 23, 2021, granted, now 11,888,499.
Claims priority of application No. 2020-197280 (JP), filed on Nov. 27, 2020.
Prior Publication US 2024/0106453 A1, Mar. 28, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H03M 1/12 (2006.01); H03K 3/03 (2006.01); H03M 1/50 (2006.01)
CPC H03M 1/502 (2013.01) [H03K 3/0315 (2013.01); H03M 1/1255 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A time-to-digital converter comprising:
a transition-state output device, the transition-state output device including:
a ring oscillator circuit that oscillates based on a trigger signal;
a state machine changing in state according to a change in state of the ring oscillator circuit;
a transition-state acquisition section acquiring state information including a signal output from the ring oscillator circuit and a signal output from the state machine, synchronously with a reference signal; and
an internal-state calculation section calculating an internal state corresponding to a number of changes in state of the ring oscillator circuit, based on the state information acquired by the transition-state acquisition section; and
a calculator section calculating a number of transitions in the internal state and calculating a time-digital value corresponding to a time event of the trigger signal, based on the number of transitions,
wherein, when the number of transitions in the internal state exceeds a threshold, the calculator section calculates the time-digital value on the assumption that the number of transitions is the threshold.