US 12,273,121 B2
Apparatus and method of reference-free SAR analog-to-digital conversion
Yuan-Ju Chao, Cupertino, CA (US)
Assigned to IPSmart Inc., Hsinchu (TW)
Filed by Yuan-Ju Chao, Cupertino, CA (US)
Filed on Oct. 24, 2022, as Appl. No. 17/971,801.
Prior Publication US 2024/0137036 A1, Apr. 25, 2024
Prior Publication US 2024/0235570 A9, Jul. 11, 2024
Int. Cl. H03M 1/12 (2006.01); H03M 1/06 (2006.01); H03M 1/38 (2006.01); H03M 1/46 (2006.01)
CPC H03M 1/1245 (2013.01) [H03M 1/0607 (2013.01); H03M 1/38 (2013.01); H03M 1/462 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A reference-free N-bit Successive Approximation Register (SAR) Analog-to-Digital (ADC) converter, comprising:
input sampling switches and (N−1) bit capacitive DAC; and
a comparator and binary search logic; the comparator output is coupled to the binary search logic, and the binary search logic is further coupled to the (N−1) bit capacitive DAC and wherein a SAR ADC input full scale value is determined by a combination associated with a sampling capacitor and an (N−1) bit capacitor value without a reference, wherein the (N−1) bit capacitive DAC couples to comparator input through individual switches and the other end of capacitors are connected together and coupled to ground;
wherein the capacitors are reset to ground during an input sampling phase.