US 12,273,119 B2
Analog-to-digital converter circuit and semiconductor integrated circuit
Shota Hino, Kanagawa (JP); and Hidetaka Haneda, Kanagawa (JP)
Assigned to SOCIONEXT INC., Yokohama (JP)
Filed by Socionext Inc., Kanagawa (JP)
Filed on Jan. 27, 2023, as Appl. No. 18/102,454.
Claims priority of application No. 2022-021562 (JP), filed on Feb. 15, 2022.
Prior Publication US 2023/0261663 A1, Aug. 17, 2023
Int. Cl. H03M 1/06 (2006.01); H03M 1/12 (2006.01); H03M 1/46 (2006.01)
CPC H03M 1/0604 (2013.01) [H03M 1/1245 (2013.01); H03M 1/462 (2013.01); H03M 1/468 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An analog-to-digital converter circuit, comprising:
a reference voltage node configured to be supplied with a reference voltage;
an analog-to-digital converter circuit unit including a reference voltage input node configured to be electrically connected to the reference voltage node, the reference voltage being input to the reference voltage input node, the analog-to-digital converter circuit unit configured to convert an input analog voltage into a digital value based on the reference voltage;
a voltage generation circuit configured to be electrically connected to the reference voltage node and generate an internal operating voltage based on the reference voltage; and
a charge compensation circuit configured to receive the internal operating voltage from the voltage generation circuit, and during operation of the analog-to-digital converter circuit unit, the charge compensation circuit configured to compensate the reference voltage input node for charge generated based on the internal operating voltage.