| CPC H03K 5/13 (2013.01) [G11C 11/4096 (2013.01); H03K 3/0315 (2013.01); H03K 19/08 (2013.01); H03K 2005/00078 (2013.01)] | 20 Claims |
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1. A delay control circuit, comprising:
a delay cell including a plurality of bias inverters, a plurality of first RC circuits, and a plurality of second RC circuits, wherein the delay cell activates a number of first RC circuits in response to a value of a step code, delays a signal that was externally input, by a delay time based on the number of the activated first RC circuits, and outputs the delayed signal;
a ZQ calibrator including a plurality of pull-up circuits and a plurality of pull-down circuits, wherein the ZQ calibrator adjusts a number of activated pull-up circuits and a number of activated pull-down circuits, to adjust an impedance of a transmission line, and inputs a pull-up voltage and a pull-down voltage, based on a calibration code corresponding to the number of the activated pull-up circuits and the number of the activated pull-down circuits, to the plurality of bias inverters; and
a step adjuster including a first ring oscillator including a plurality of test delay cells having a circuit structure, equal to a circuit structure of the delay cell, wherein the step adjuster determines characteristics of the first and second RC circuits, based on a pulse period that depends on whether or not the second RC circuits included in the first ring oscillator are activated, and activates a number of second RC circuits based on the characteristics and an operating frequency of the delay control circuit.
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