US 12,273,099 B2
Driver with adaptive drive strength
Tuli Dake, Plano, TX (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on May 25, 2023, as Appl. No. 18/323,987.
Prior Publication US 2024/0396542 A1, Nov. 28, 2024
Int. Cl. H03K 17/0812 (2006.01); H03K 3/017 (2006.01); H03K 3/3565 (2006.01); H03K 19/0944 (2006.01)
CPC H03K 17/08122 (2013.01) [H03K 3/017 (2013.01); H03K 3/3565 (2013.01); H03K 19/0944 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A driver, comprising:
a first transistor coupled between a power supply terminal and a driver output terminal, the first transistor having a first transistor control terminal;
a second transistor coupled between the driver output terminal and a power supply reference terminal, the second transistor having a second transistor control terminal;
a circuit having a first circuit output and a second circuit output, the circuit configured to:
generate a first logic signal at the first circuit output in response to whether a voltage at the driver output terminal is smaller than a supply voltage at the power supply terminal; and
generate a second logic signal at the second circuit output in response to whether the voltage at the driver output terminal is larger than a power supply reference voltage at the power supply reference terminal;
a first pre-driver having a first pre-driver control input, a first drive-strength programming input, and a first pre-driver output, the first drive-strength programming input coupled to the first circuit output, the first pre-driver output coupled to the first transistor control terminal, and the first pre-driver configured to turn on and off the first transistor based on a logic state of a pulse width modulation (PWM) signal at the first pre-driver control input, and the first pre-driver configured to have an adaptable drive strength based on a logic state of the first logic signal; and
a second pre-driver having a second pre-driver control input, a second drive-strength programming input, and a second pre-driver output, the second drive-strength programming input coupled to the second circuit output, the second pre-driver output coupled to the second transistor control terminal, and the second pre-driver configured to turn on and off the second transistor based on the logic state of the PWM signal at the second pre-driver control input, and the second pre-driver configured to have an adaptable drive strength based on a logic state of the second logic signal.