US 12,273,085 B2
Attenuation circuitry
Vlad Cretu, Maidenhead (GB)
Assigned to SOCIONEXT INC., Kanagawa (JP)
Filed by Socionext Inc., Kanagawa (JP)
Filed on Jun. 10, 2022, as Appl. No. 17/837,562.
Claims priority of application No. 21180452 (EP), filed on Jun. 18, 2021.
Prior Publication US 2022/0407502 A1, Dec. 22, 2022
Int. Cl. H03H 11/24 (2006.01)
CPC H03H 11/245 (2013.01) 13 Claims
OG exemplary drawing
 
1. Differential attenuation circuitry, comprising:
first and second input nodes;
first and second output nodes; and
an impedance network connected between the first and second input nodes and the first and second output nodes to provide a differential output voltage signal between the first and second output nodes which is attenuated compared to a differential input voltage signal applied between the first and second input nodes,
wherein the impedance network comprises:
a common-mode node which is configured to define a common mode voltage level;
a first impedance network connected between the first input node, the common-mode node and the first output node; and
a second impedance network connected between the second input node, the common-mode node and the second output node,
and wherein the differential attenuation circuitry further comprises:
a first input-to-input path comprising one or more impedances and a switch connected between the first and second input nodes to provide a current path independent of the common-mode node between the first and second input nodes when the switch of that path is ON; and
a first output-to-output path comprising one or more impedances and a switch connected between the first and second output nodes to provide a current path independent of the common-mode node between the first and second output nodes when the switch of that path is ON,
wherein the switch of the first input-to-input path and the switch of the first output-to-output path are transistors,
wherein the one or more impedances and the switch of the first input-to-input path comprise a first auxiliary impedance, a first auxiliary switch and a second auxiliary impedance connected in series in that order between the first and second input nodes,
wherein the differential attenuation circuitry comprises a second input-to-input path comprising the first auxiliary impedance, a third auxiliary impedance, a second auxiliary switch, a fourth auxiliary impedance, and the second auxiliary impedance connected in series in that order between the first and second input nodes.