| CPC H01L 29/0673 (2013.01) [H01L 21/02603 (2013.01); H01L 21/823431 (2013.01); H01L 21/823821 (2013.01); H01L 27/0886 (2013.01); H01L 27/0924 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01)] | 20 Claims |

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1. A semiconductor structure, comprising:
a substrate;
nanostructures formed over the substrate and spaced apart from each other in a first direction;
a gate structure wrapping around the nanostructures;
a semiconductor layer attached to the nanostructures in a second direction different from the first direction;
inner spacers sandwiched between the semiconductor layer and the gate structure in the second direction; and
a silicide layer formed over the semiconductor layer,
wherein a first portion of the semiconductor layer is sandwiched between the inner spacers and the silicide layer in the second direction.
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