US 12,272,693 B2
Semiconductor device and method for fabricating the same
Chun-Ya Chiu, Tainan (TW); Chih-Kai Hsu, Tainan (TW); Ssu-I Fu, Kaohsiung (TW); Yu-Hsiang Lin, New Taipei (TW); Chien-Ting Lin, Tainan (TW); Chia-Jung Hsu, Tainan (TW); and Chin-Hung Chen, Tainan (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Mar. 21, 2022, as Appl. No. 17/700,475.
Claims priority of application No. 202210155370.7 (CN), filed on Feb. 21, 2022.
Prior Publication US 2023/0268346 A1, Aug. 24, 2023
Int. Cl. H01L 27/092 (2006.01); H01L 21/02 (2006.01); H01L 21/3105 (2006.01); H01L 21/8238 (2006.01)
CPC H01L 27/0922 (2013.01) [H01L 21/0214 (2013.01); H01L 21/02164 (2013.01); H01L 21/02271 (2013.01); H01L 21/31053 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01); H01L 27/0924 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for fabricating a semiconductor device, comprising:
providing a substrate having a high-voltage (HV) region and a low-voltage (LV) region;
forming a base on the HV region and fin-shaped structures on the LV region;
forming a first insulating around the fin-shaped structures; and
removing the base, the first insulating layer, and part of the fin-shaped structures at the same time to form a first trench in the HV region and a second trench in the LV region.