US 12,272,664 B2
Semiconductor packages having conductive pillars with inclined surfaces
Chiang-Jui Chu, Yilan County (TW); Ching-Wen Hsiao, Hsinchu (TW); Hao-Chun Liu, Hsinchu (TW); Ming-Da Cheng, Taoyuan (TW); Young-Hwa Wu, Tainan (TW); and Tao-Sheng Chang, Tainan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jan. 2, 2024, as Appl. No. 18/402,611.
Application 18/402,611 is a continuation of application No. 17/841,683, filed on Jun. 16, 2022, granted, now 11,901,323.
Application 17/841,683 is a continuation of application No. 16/866,562, filed on May 5, 2020, granted, now 11,398,444, issued on Jul. 26, 2022.
Claims priority of provisional application 62/893,778, filed on Aug. 29, 2019.
Prior Publication US 2024/0136316 A1, Apr. 25, 2024
Int. Cl. H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 24/13 (2013.01) [H01L 24/05 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/13017 (2013.01); H01L 2224/1355 (2013.01); H01L 2224/16059 (2013.01); H01L 2924/37001 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a conductive pillar, wherein the conductive pillar has a first sidewall and a second sidewall opposite to the first sidewall, wherein a height and a total length of the first sidewall are respectively greater than a height and a total length of the second sidewall; and
a solder disposed on and in direct contact with the conductive pillar, wherein the solder is hanging over the first sidewall and the second sidewall of conductive pillar.