US 12,272,627 B2
Semiconductor device
Hiroshi Yamamoto, Minato (JP)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed by KABUSHIKI KAISHA TOSHIBA, Tokyo (JP); and TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION, Tokyo (JP)
Filed on Mar. 3, 2022, as Appl. No. 17/653,308.
Claims priority of application No. 2021-154765 (JP), filed on Sep. 22, 2021.
Prior Publication US 2023/0091854 A1, Mar. 23, 2023
Int. Cl. H01L 23/495 (2006.01); H02M 3/335 (2006.01); H02M 7/5387 (2007.01)
CPC H01L 23/49575 (2013.01) [H01L 23/4951 (2013.01); H01L 23/49562 (2013.01); H02M 3/33571 (2021.05); H02M 3/33573 (2021.05); H02M 3/33576 (2013.01); H02M 7/5387 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A semiconductor device comprising
a DC-DC converter including a primary-side circuit and a secondary-side circuit including a first semiconductor package accommodating a first semiconductor element group including a first semiconductor element and a second semiconductor element,
wherein the first semiconductor element and the second semiconductor element are stacked,
the first semiconductor element group is a MOSFET, an IGBT, or a diode, and
when the first semiconductor element group is the MOSFET, a source electrode of the first semiconductor element and a source electrode of the second semiconductor element are electrically connected to face each other in a stacking direction of the first semiconductor element and the second semiconductor element, and when the first semiconductor element group is the IGBT, an emitter electrode of the first semiconductor element and an emitter electrode of the second semiconductor element are electrically connected to face each other in the stacking direction of the first semiconductor element and the second semiconductor element, or when the first semiconductor element group is the diode, a first lead frame in which a cathode electrode of the first semiconductor element and a cathode electrode of the second semiconductor element are electrically connected to face each other in the stacking direction of the first semiconductor element and the second semiconductor element is included in the first semiconductor package,
the first lead frame is positioned between the first semiconductor element and the second semiconductor element,
the first semiconductor package includes a first common terminal connected to the first lead frame, and
the first common terminal is electrically connected to a low potential side output terminal of the secondary-side circuit.