US 12,272,613 B2
Thermal structure for semiconductor device and method of forming the same
Wei-Ming Wang, Taichung (TW); Yu-Hung Lin, Taichung (TW); Shih-Peng Tai, Xinpu Township (TW); and Kuo-Chung Yee, Taoyuan (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 11, 2022, as Appl. No. 17/861,556.
Prior Publication US 2024/0014091 A1, Jan. 11, 2024
Int. Cl. H01L 29/15 (2006.01); H01L 23/00 (2006.01); H01L 23/367 (2006.01); H01L 23/48 (2006.01); H01L 25/065 (2023.01); H01L 31/0312 (2006.01)
CPC H01L 23/367 (2013.01) [H01L 23/481 (2013.01); H01L 24/08 (2013.01); H01L 25/0657 (2013.01); H01L 23/3675 (2013.01); H01L 24/05 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/80 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/08245 (2013.01); H01L 2224/29193 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/29393 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/80896 (2013.01); H01L 2225/06589 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
an integrated circuit structure, comprising:
a semiconductor substrate comprising circuitry;
a dielectric layer over the semiconductor substrate;
an interconnect structure over the dielectric layer; and
a first thermal fin extending through the semiconductor substrate, the dielectric layer, and the interconnect structure, the first thermal fin being electrically isolated from the circuitry; and
a thermal pillar over the integrated circuit structure, wherein the thermal pillar is thermally coupled to the first thermal fin.