| CPC H01L 22/20 (2013.01) [C23C 16/52 (2013.01); H01J 37/32449 (2013.01); H01J 37/32899 (2013.01); H01L 21/02164 (2013.01); H01L 21/0217 (2013.01); H01L 21/02274 (2013.01); C23C 16/345 (2013.01); C23C 16/401 (2013.01); H01J 2237/24585 (2013.01); H01J 2237/3321 (2013.01); H01L 21/02211 (2013.01)] | 28 Claims |

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1. A method comprising:
providing a first substrate to a first station in a semiconductor processing chamber;
providing a second substrate to a second station in the semiconductor processing chamber;
concurrently depositing a first bow compensation layer of material on the backside of the first substrate at the first station and a first bow compensation layer of material on the backside of the second substrate at the second station; and
depositing a second bow compensation layer of material on the backside of the first substrate, while the first substrate is at the first station and the second substrate is at the second station, and while not concurrently depositing material on the backside of the second substrate.
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