| CPC H01L 21/561 (2013.01) [H01L 21/3043 (2013.01); H01L 23/13 (2013.01); H01L 23/3135 (2013.01); H01L 25/0655 (2013.01); H01L 25/18 (2013.01); H01L 21/563 (2013.01); H01L 23/147 (2013.01); H01L 23/3185 (2013.01); H01L 23/3192 (2013.01); H01L 23/481 (2013.01); H01L 24/73 (2013.01); H01L 24/97 (2013.01); H01L 2224/73204 (2013.01)] | 20 Claims |

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1. A semiconductor package, comprising:
an interposer having a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces;
at least one semiconductor die, disposed on the first surface of interposer and electrically connected with the interposer;
an encapsulant, disposed over the interposer and laterally encapsulating the at least one semiconductor die;
connectors, disposed on the second surface of the interposer, and electrically connected with the at least one semiconductor die through the interposer; and
a protection layer, disposed on the second surface of the interposer and surrounding the connectors, wherein the sidewalls of the interposer include slant sidewalls connected to the second surface and vertical sidewalls connecting the slant sidewalls with the first surface, and the protection layer is in contact with the slant sidewalls of the interposer.
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