US 12,272,557 B2
Semiconductor device and method
Kuei-Lun Lin, Keelung (TW); Chia-Wei Hsu, New Taipei (TW); Xiong-Fei Yu, Hsinchu (TW); Chi On Chui, Hsinchu (TW); Chih-Yu Hsu, Xinfeng Township (TW); and Jian-Hao Chen, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Aug. 1, 2023, as Appl. No. 18/363,563.
Application 18/363,563 is a continuation of application No. 17/162,270, filed on Jan. 29, 2021, granted, now 11,862,468.
Prior Publication US 2023/0377891 A1, Nov. 23, 2023
Int. Cl. H01L 21/82 (2006.01); H01L 21/28 (2006.01); H01L 21/285 (2006.01); H01L 21/3205 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 27/088 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01); H01L 21/3213 (2006.01)
CPC H01L 21/28185 (2013.01) [H01L 21/28525 (2013.01); H01L 21/32055 (2013.01); H01L 21/823431 (2013.01); H01L 21/823821 (2013.01); H01L 27/0886 (2013.01); H01L 27/0924 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 21/32051 (2013.01); H01L 21/32134 (2013.01); H01L 21/32135 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
depositing a gate dielectric layer on a first fin and a second fin, the first fin and the second fin extending away from a substrate in a first direction, a distance between the first fin and the second fin decreasing along the first direction;
depositing a first sacrificial layer on the gate dielectric layer;
depositing a second sacrificial layer on the first sacrificial layer by exposing the first sacrificial layer to a self-limiting source precursor and then to a self-reacting source precursor, the self-limiting source precursor comprising SiH3 groups that react with dangling bonds from the first sacrificial layer to form a material of the second sacrificial layer, the self-reacting source precursor comprising SiH3 groups that repeatedly react with previously formed SiH3 groups to form the material of the second sacrificial layer; and
annealing the gate dielectric layer while the second sacrificial layer and the first sacrificial layer cover the gate dielectric layer.