US 12,272,555 B2
Methods of forming semiconductor devices
Jinyoung Park, Anyang-si (KR); Jungpyo Hong, Gwangmyeong-si (KR); Yangdoo Kim, Seoul (KR); Yonghwan Kim, Hwaseong-si (KR); and Sangwuk Park, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 7, 2022, as Appl. No. 17/938,684.
Claims priority of application No. 10-2021-0135216 (KR), filed on Oct. 12, 2021.
Prior Publication US 2023/0110190 A1, Apr. 13, 2023
Int. Cl. H01L 21/033 (2006.01); H01L 21/027 (2006.01); H01L 21/3065 (2006.01); H01L 21/308 (2006.01); H01L 21/311 (2006.01); H01L 21/3213 (2006.01)
CPC H01L 21/0337 (2013.01) [H01L 21/0276 (2013.01); H01L 21/0332 (2013.01); H01L 21/3065 (2013.01); H01L 21/3086 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 21/32136 (2013.01); H01L 21/32139 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor device, the method comprising:
providing a substrate on which a layer is formed;
forming a lower hard-mask layer on the layer, the lower hard-mask layer comprising silicon;
forming an upper hard-mask pattern on the lower hard-mask layer, the upper hard-mask pattern comprising oxide;
forming a lower hard-mask pattern by etching the lower hard-mask layer using the upper hard-mask pattern as an etch mask and using an etching gas that comprises a first gas comprising a metal-chloride and a second gas comprising nitrogen; and
forming a plurality of contact holes in the layer by etching the layer using the lower hard-mask pattern as an etch mask.