US 12,272,423 B2
Methods of operating a near memory processing-dual in-line memory module (NMP-DIMM) for performing a read operation and an adaptive latency module and a system thereof
Sachin Suresh Upadhya, Bengaluru (IN); Eldho Pathiyakkara Thombra Mathew, Bengaluru (IN); Mayuresh Jyotindra Salelkar, Bengaluru (IN); Jinin So, Hwaseong-si (KR); Jonggeon Lee, Seoul (KR); and Kyungsoo Kim, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Oct. 27, 2022, as Appl. No. 17/974,940.
Claims priority of application No. 202241029969 (IN), filed on May 25, 2022.
Prior Publication US 2023/0386534 A1, Nov. 30, 2023
Int. Cl. G11C 7/10 (2006.01); G11C 7/22 (2006.01)
CPC G11C 7/1069 (2013.01) [G11C 7/1063 (2013.01); G11C 7/1066 (2013.01); G11C 7/227 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A method of operating a Near Memory Processing-Dual In-line Memory (NMP-DIMM) system, the method comprising:
determining, by an adaptive latency module of the NMP-DIMM system, a synchronized read latency value for performing a read operation upon receiving a Multi-Purpose Register (MPR) read instruction from a host device communicatively connected with the NMP-DIMM system, wherein the MPR read instruction is received from the host device for training the NMP-DIMM system, wherein the synchronized read latency value is determined based on one or more read latency values associated with one or more memory units of the NMP-DIMM system; and
synchronizing, by the adaptive latency module, one or more first type data paths with a second type data path in the NMP-DIMM system based on the determined synchronized read latency value,
wherein the one or more first type data paths are associated with extracting data from the one or more memory units of the NMP-DIMM system, each of the one or more memory units is a Dynamic Random-Access Memory (DRAM), and
wherein the second type data path is associated with extracting data from a configuration space of the NMP-DIMM system, wherein the configuration space configures an accelerator of the NMP-DIMM system, and stores results and status of the accelerator.