US 12,272,413 B2
Method of manufacturing an electrically programmable semiconductor anti-fuse device that includes utilizing previously fabricated device elements as masks for subsequently fabricated elements
Hsih-Yang Chiu, Taoyuan (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Jun. 13, 2022, as Appl. No. 17/838,726.
Prior Publication US 2023/0402115 A1, Dec. 14, 2023
Int. Cl. G11C 17/16 (2006.01); H01L 23/525 (2006.01); H10B 20/25 (2023.01)
CPC G11C 17/16 (2013.01) [H01L 23/5252 (2013.01); H10B 20/25 (2023.02)] 10 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
forming a first insulative film on a substrate;
forming a first electrode on the first insulative film;
implanting dopants in the substrate to form a plurality of first impurity regions on either side of the first electrode;
forming a capping layer to cover the first electrode;
forming a second insulative film on portions of the substrate exposed through the first electrode and the capping layer;
forming a second electrode disposed over the capping layer and first portions of the second insulative film;
removing second portions of the second insulative film on either side of the second electrode; and
implanting dopants in portions of the substrate exposed by the second insulative film to form a plurality of second impurity regions.