US 12,272,410 B2
Method for reading three-dimensional flash memory
Zilong Chen, Hubei (CN); and Xiang Fu, Hubei (CN)
Assigned to Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed on Feb. 10, 2023, as Appl. No. 18/167,645.
Application 18/167,645 is a continuation of application No. 17/324,877, filed on May 19, 2021, granted, now 11,600,342.
Application 17/324,877 is a continuation of application No. 16/729,838, filed on Dec. 30, 2019, granted, now 11,043,279, issued on Jun. 22, 2021.
Application 16/729,838 is a continuation of application No. PCT/CN2019/112728, filed on Oct. 23, 2019.
Prior Publication US 2023/0197170 A1, Jun. 22, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 16/00 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01); H10B 43/27 (2023.01)
CPC G11C 16/3427 (2013.01) [G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/26 (2013.01); H10B 43/27 (2023.02)] 20 Claims
OG exemplary drawing
 
16. A three-dimensional (3D) memory device, comprising:
memory strings, each memory string connected with a bit line and comprising memory cells connected in series, each memory cell addressable through a word line and the bit line of each memory string; and
a circuit for performing a read-verification operation on a target memory cell, the circuit configured to:
apply, on an unselected top select gate of an unselected memory string, a prepare voltage during a first time period and an off voltage during a second time period;
apply, on a selected word line associated with the target memory cell, a first voltage during the first time period; and
apply, on an unselected word line, a pass voltage during the first time period, wherein the first voltage is lower than the pass voltage, and the first time period is prior to the second time period.