| CPC G11C 16/08 (2013.01) [G11C 16/16 (2013.01); G11C 29/12 (2013.01); G11C 16/0483 (2013.01); G11C 2029/1202 (2013.01)] | 20 Claims |
|
1. An operating method of a memory device, comprising:
acquiring an address of a first bad word line, the first bad word line included in a plurality of word lines of the memory device;
detecting whether word lines adjacent to the first bad word line are bad based on the address of the first bad word line, the word lines adjacent to the first bad word line included in the plurality of word lines;
designating a first word line among the word lines adjacent to the first bad word line as a prohibited word line, the first word line being detected as a second bad word line; and
sending first data via a second word line detected as a normal word line among the word lines adjacent to the first bad word line using a first voltage that is lower than a second voltage used to program normal word lines, the normal word lines being one or more of the plurality of word lines excluding the word lines adjacent to the first bad word line.
|