US 12,272,402 B2
Vertical nonvolatile memory device including memory cell string
Minhyun Lee, Suwon-si (KR); Taein Kim, Seoul (KR); Youngtek Oh, Suwon-si (KR); Hyeonjin Shin, Suwon-si (KR); and Changseok Lee, Gwacheon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Mar. 30, 2022, as Appl. No. 17/708,362.
Claims priority of application No. 10-2021-0043524 (KR), filed on Apr. 2, 2021.
Prior Publication US 2022/0319602 A1, Oct. 6, 2022
Int. Cl. G11C 16/04 (2006.01); H10B 41/20 (2023.01); H10B 41/35 (2023.01); H10B 43/20 (2023.01); H10B 43/35 (2023.01)
CPC G11C 16/0483 (2013.01) [H10B 41/20 (2023.02); H10B 41/35 (2023.02); H10B 43/20 (2023.02); H10B 43/35 (2023.02)] 24 Claims
OG exemplary drawing
 
1. A nonvolatile memory device comprising:
a plurality of memory cell strings, each of the plurality of memory cell strings including
a plurality of insulating spacers each extending in a first direction,
a plurality of gate electrodes each extending in the first direction and alternately arranged with the plurality of insulating spacers in a second direction perpendicular to the first direction, and
a plurality of contacts respectively arranged to contact a side surface of the plurality of gate electrodes respectively corresponding to the plurality of contacts,
wherein a wide the first direction of the plurality of insulating spacers and the plurality of gate electrodes, which are alternatively arranged with each other, gradually decreases in the second direction, and
the plurality of insulating spacers and the plurality of gate electrodes each have an inclined peripheral side surface.