US 12,272,308 B2
Display substrate and display device
Xueling Gao, Beijing (CN); Kuanjun Peng, Beijing (CN); Chengchung Yang, Beijing (CN); Xiangxiang Zou, Beijing (CN); and Wei Qin, Beijing (CN)
Assigned to BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed by BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed on Jan. 24, 2024, as Appl. No. 18/421,268.
Application 18/421,268 is a continuation of application No. 18/194,348, filed on Mar. 31, 2023, granted, now 11,922,879.
Application 18/194,348 is a continuation of application No. 17/661,318, filed on Apr. 29, 2022, granted, now 11,682,349.
Application 17/661,318 is a continuation of application No. 17/327,937, filed on May 24, 2021, granted, now 11,348,524.
Application 17/327,937 is a continuation in part of application No. 16/650,217, granted, now 11,030,959, previously published as PCT/CN2018/105999, filed on Sep. 17, 2018.
Claims priority of application No. 201710917398.9 (CN), filed on Sep. 30, 2017.
Prior Publication US 2024/0169917 A1, May 23, 2024
Int. Cl. G09G 3/3233 (2016.01); H10K 59/121 (2023.01)
CPC G09G 3/3233 (2013.01) [H10K 59/121 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2320/0257 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A display substrate comprising:
a base substrate;
a sub-pixel, provided on the base substrate and comprising a pixel circuit, wherein the pixel circuit comprises: a driving circuit, a first reset circuit, a first light emission control circuit, a first light emission control line, a scan line and a light emitter element,
the driving circuit comprises a control terminal, a first terminal and a second terminal, the first light emission control circuit is configured to apply a first voltage to the first terminal of the driving circuit in response to a first light emission control signal provided by the first light emission control line; and
a control terminal of the first reset circuit is connected to a first reset control terminal to receive a first reset signal, a first terminal of the first reset circuit is connected to the control terminal of the driving circuit, and a second terminal of the first reset circuit is connected to a reset voltage terminal to receive a first reset voltage;
the pixel circuit further comprises a compensation circuit, the compensation circuit is electrically connected with the control terminal of the driving circuit and the second terminal of the driving circuit, and configured to store a data signal that is written in and compensate the driving circuit in response to a scan signal; the compensation circuit comprises a storage capacitor, a control terminal of the compensation circuit is connected with the scan line which is connected with a scan signal terminal to receive the scan signal, a first electrode plate of the storage capacitor is connected with the control terminal of the driving circuit, and a second electrode plate of the storage capacitor is connected with the first voltage terminal;
the first light emission control line extends along a first direction, and a second direction intersects with the first direction;
the display substrate further comprises:
a second light emission control circuit, configured to apply the driving current to the light emitter element in response to a second light emission control signal; and
a second light emission control line, configured to provide the second light emission control signal, wherein
the first light emission control line and the second light emission control line extend along a same direction;
the first light emission control line and the second light emission control line are spaced apart from each other in the second direction; in the second direction, both an orthographic projection of the first light emission control line on the base substrate and an orthographic projection of the second light emission control line are at a first side of an orthographic projection of the first electrode plate of the storage capacitor on the base substrate, and an orthographic projection of the scan line on the base substrate is at a second side of the orthographic projection of the first electrode plate of the storage capacitor on the base substrate which is opposite to the first side.