US 12,272,285 B1
Display panel, control method of display panel and display device
Renliang Zhu, Xiamen (CN); Jinliang Huang, Xiamen (CN); and Yiqiang Lin, Xiamen (CN)
Assigned to Xiamen Tianma Micro-Electronics Co., Ltd., Xiamen (CN)
Filed by Xiamen Tianma Micro-Electronics Co., Ltd., Xiamen (CN)
Filed on Apr. 10, 2024, as Appl. No. 18/632,117.
Claims priority of application No. 202410123675.9 (CN), filed on Jan. 29, 2024.
Int. Cl. G09G 3/20 (2006.01)
CPC G09G 3/20 (2013.01) [G09G 2310/0202 (2013.01); G09G 2310/0264 (2013.01); G09G 2320/02 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A display panel, comprising:
a display area;
a non-display area at least partially surrounding the display area; and
a control circuit, or a plurality of first soldering pads and a plurality of second soldering pads,
wherein:
the display area includes a plurality of data lines extending in a first direction;
the non-display area includes a plurality of source connection lines, a plurality of clock control signal lines, a plurality of active signal lines, a bonding area and a multiplexer located between the display area and the bonding area, the multiplexer is electrically connected to a first end of a source level connection line of the plurality of source connection lines and a first end of a clock control signal line of the plurality of clock control signal lines respectively, the bonding area includes two driver chips arranged oppositely in the first direction, each of the two driver chips is electrically connected to second ends of the plurality of source connection lines and second ends of the plurality of clock control signal lines, and the plurality of active signal lines are distributed between the plurality of the source connection lines and the plurality of the clock control signal lines;
the control circuit is electrically connected to the two driver chips, and configured to control the two driver chips not to output active signals to correspondingly connected active signal lines of the plurality of active signal lines at the same time and not to output driving signals to correspondingly connected clock control signal lines of the plurality of clock control signal lines, and each of the two driver chips is electrically connected to at least one of the plurality of active signal lines; and
the plurality of first soldering pads and the plurality of second soldering pads are distributed in the bonding area, one end of each active signal line of the plurality of active signal lines is connected to a different first soldering pad of the plurality of first soldering pads, each of two driver chips is electrically connected to at least one of the plurality of first soldering pads, each of the plurality of clock control signal lines is electrically connected to the driver chip through a different second soldering pad of the plurality of second soldering pads, and the first soldering pad meets one of the following conditions: at least one first target soldering pad among the plurality of first soldering pads and a second target soldering pad among the plurality of second soldering pads are connected to a same driver chip of the two driver chips, a minimum distance between the second target soldering pad and the first target soldering pad is greater than a target size, the target size is half a length of the driver chip in the second direction, the second direction is perpendicular to the first direction, and when a number of the plurality of first pads is two, the display panel further includes a first driving circuit and a second driving circuit electrically connected to different first soldering pads of the plurality of first soldering pads.