US 12,272,050 B2
Deep learning-based root cause analysis of process cycle images
Kimberly Jean Gietzen, San Diego, CA (US); Jingtao Liu, San Diego, CA (US); and Yifeng Tao, Pittsburg, PA (US)
Assigned to Illumina, Inc., San Diego, CA (US)
Filed by Illumina, Inc., San Diego, CA (US)
Filed on Jan. 28, 2022, as Appl. No. 17/588,077.
Claims priority of provisional application 63/143,673, filed on Jan. 29, 2021.
Prior Publication US 2022/0245801 A1, Aug. 4, 2022
Int. Cl. G06T 7/00 (2017.01); G01N 21/64 (2006.01); G06N 3/08 (2023.01); G06T 3/40 (2006.01); G06V 10/764 (2022.01); G06V 10/774 (2022.01); G06V 10/82 (2022.01)
CPC G06T 7/0012 (2013.01) [G01N 21/6428 (2013.01); G01N 21/6456 (2013.01); G06N 3/08 (2013.01); G06T 3/40 (2013.01); G06V 10/764 (2022.01); G06V 10/774 (2022.01); G06V 10/82 (2022.01); G01N 2021/6439 (2013.01); G06T 2207/10008 (2013.01); G06T 2207/10064 (2013.01); G06T 2207/20132 (2013.01); G06T 2207/30072 (2013.01); G06V 2201/04 (2022.01)] 27 Claims
OG exemplary drawing
 
1. A method of training a convolutional neural network to identify and classify images of sections of an image generating chip resulting in process failure, the method comprising:
using the convolutional neural network, pretrained to extract image features, wherein the pretrained convolutional neural network accepts images of dimensions M×N;
creating a training data set using labeled images of dimensions J×K, which is smaller than the dimensions M×N, that depict process success and failure;
the labeled images are from the sections of the image generating chip,
positioning the J×K labeled images at multiple locations in at least one M×N frame,
using at least one portion of a particular J×K labeled image to fill in around edges of the particular J×K labeled image, thereby filling the at least one M×N frame;
further training the pretrained convolutional neural network to produce a trained classifier using the training data set; and
storing coefficients of the trained classifier to identify and classify images of sections of the image generating chip from production process cycles.