| CPC G06T 7/0004 (2013.01) [G06T 7/10 (2017.01)] | 20 Claims |

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1. A system of examination of a semiconductor specimen, the system comprising a processor and memory circuitry (PMC) configured to:
obtain, for each given candidate defect of a plurality of candidate defects in an image of the semiconductor specimen acquired by an examination tool, a given area of the given candidate defect in the image;
obtain a reference image;
perform a segmentation of at least part of the reference image, the segmentation comprising, for each given candidate defect:
obtaining a given reference area in the reference image corresponding to the given area of said given candidate defect in the image according to a correspondence criterion, and
determining first reference areas in the reference image, wherein, for each given first reference area, first data informative of a pixel intensity of said given first reference area matches first data informative of a pixel intensity of the given reference area according to a first similarity criterion; and
for each given candidate defect:
for each given first reference area, compare second data informative of a pixel intensity of said given first reference area to second data informative of a pixel intensity of the given reference area;
select among the first reference areas, a plurality of second reference areas for which the comparison indicates a match according to a second similarity criterion;
obtain a plurality of second areas in the image, wherein each given second area corresponds to one of the second reference areas according to the correspondence criterion; and
use data informative of a pixel intensity of the second areas and data informative of a pixel intensity of the given area to determine whether the given candidate defect corresponds to a defect.
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