US 12,271,760 B2
Cluster identifier remapping for asymmetric topologies
Vinit Mathew Abraham, Hillsboro, OR (US); Anand K. Enamandram, Folsom, CA (US); and Eswaramoorthi Nallusamy, Cedar Park, TX (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 16, 2021, as Appl. No. 17/477,470.
Prior Publication US 2022/0004439 A1, Jan. 6, 2022
Int. Cl. G06F 9/50 (2006.01); G06F 9/30 (2018.01); G06F 9/4401 (2018.01); G06F 13/42 (2006.01)
CPC G06F 9/5066 (2013.01) [G06F 9/30101 (2013.01); G06F 9/4406 (2013.01); G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A non-transitory machine-readable storage medium with instructions stored thereon, the instructions executable by a machine to cause the machine to:
access a cluster remapping register stored in computer memory;
determine, from the cluster remapping register, a mapping of a first integrated circuit block in a first chip to a first cluster identifier, wherein the first cluster identifier is different than an assigned cluster identifier for the first integrated circuity block;
determine, from the cluster remapping register, a mapping of a second integrated circuit block in the first chip to a second cluster identifier from the cluster remapping register;
identify a first interconnect link to couple the first integrated circuit block in the first chip to a third integrated circuit block in a second chip;
identify a second interconnect link to couple the second integrated circuit block in the first chip to a fourth integrated circuit block in the second chip; and
determine whether connections made by the first and second interconnect links match connections defined in the cluster remapping register.