US 12,271,717 B2
Loop index set merging optimization for program instructions
Bardia Mahjour, Newmarket (CA); Prasanth Chatarasi, White Plains, NY (US); Jintao Zhang, White Plains, NY (US); and Alberto Mannari, Basel (CH)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Apr. 18, 2023, as Appl. No. 18/302,214.
Prior Publication US 2024/0354081 A1, Oct. 24, 2024
Int. Cl. G06F 9/455 (2018.01); G06F 8/41 (2018.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/445 (2018.01)
CPC G06F 8/443 (2013.01) 25 Claims
OG exemplary drawing
 
1. A computer implemented method for merging loops, comprising:
identifying, by a number of processor units, loops in computer code, wherein the loops are sequences of instructions that are repeated until conditions for the loops are reached;
creating, by the number of processor units, a tree comprising nodes that represent the loops and edges that represent relationships between nodes;
analyzing, by the number of processor units, the tree to identify a pair of candidate loops from sibling nodes; and
creating, by the number of processor units, a new loop from the pair of candidate loops with an expanded iteration space based on iteration spaces for the pair of candidate loops in response to the pair of candidate loops being eligible for merging.